Supriyo Datta

Y25. 00011: Magnetic octupole p-bits in chiral antiferromagnets: Towards robust and ultra-fast probabilistic computing*

The LaAlO 3-SrTiO 3 (LAO-STO) heterostructure is known to host an electron gas of two-dimensional character (2DEG) at its interface. There is evidence of an enhancement in the measured differential capacitance of top-gated LAO-STO [1, 2], in excess of the geometric capacitance. In this work, we present a phenomenological model that features a coupling between charge (in 2DEG) and structural distortion (in surface layers of STO), and calculate the modification of differential capacitance due to this term. We classify the phases of single-domain STO coupled to 2DEG charge, account for the contribution from ferroelastic domain boundaries, and make connections with data available from experiments.

An emerging paradigm in modern electronics is that of CMOS + requiring the integration of standard CMOS technology with novel materials and technologies denoted by . In this context, a crucial challenge is to develop accurate circuit models for that are compatible with standard models for CMOS-based circuits and systems. In this perspective we present physics-based, experimentally benchmarked modular circuit models that can be used to evaluate a class of CMOS + systems, where denotes magnetic and spintronic materials and phenomena. This class of materials is particularly challenging because they go beyond conventional charge-based phenomena and involve the spin degree of freedom which involves non-trivial quantum effects. Starting from density matrices the central quantity in quantum transport using well-defined approximations, it is possible to obtain spin-circuits that generalize ordinary circuit theory to 4-component currents and voltages (1 for charge and 3 for spin). With step-by-step examples that progressively go higher in the computing stack, we illustrate how the spin-circuit approach can be used to start from the physics of magnetism and spintronics to enable accurate system-level evaluations. We believe the core approach can be extended to include other quantum degrees of freedom like valley and pseudospins starting from corresponding density matrices.

We demonstrate a 1. 2x reduction in write voltage, 20x improvement in write speed and unlimited cycling endurance on a BEOL compatible Ferroelectric FET (FeFET) at 77K (Cold FeFET), justifying the potential of Cold-FEFET as a candidate for last-level cache memory in cryogenic high-performance computing (HPC) applications. Highly stable and tight threshold voltage distribution characteristics for both programmed and erased states in Cold-FeFET (pre and post cycling) is leveraged to reduce the read-current window specs and lower the write voltage amplitude and pulse compared to room temperature operation. In conjunction with logic CMOS operating at 77K, monolithic 3D integrated Cold-FeFET with unlimited write endurance provides an effective solution for future cryogenic HPC applications.

Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). With the advent of various special purpose devices and domain specific hardware, it has become increasingly important to establish clear benchmarks of what improvements these technologies offer compared to existing technologies. In this paper, we demonstrate 2 to 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 to 3 orders of magnitude by mapping it to a clockless analog processor. Our demonstration provides a roadmap for 5 to 6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as …

We show that we can harness two recent experimental developments to build a compact hardware emulator for the classical Heisenberg model in statistical physics. The first is the demonstration of spin-diffusion lengths in excess of microns in graphene even at room temperature. The second is the demonstration of low barrier magnets (LBMs) whose magnetization can fluctuate rapidly even at sub-nanosecond rates. Using experimentally benchmarked circuit models, we show that an array of LBMs driven by an external current source has a steady-state distribution corresponding to a classical system with an energy function of the form ). This may seem surprising for a non-equilibrium system but we show that it can be justified by a Lyapunov function corresponding to a system of coupled Landau-Lifshitz-Gilbert (LLG) equations. The Lyapunov function we construct describes LBMs interacting through the spin currents they inject into the spin neutral substrate. We suggest ways to tune the coupling coefficients so that it can be used as a hardware solver for optimization problems involving continuous variables represented by vector magnetizations, similar to the role of the Ising model in solving optimization problems with binary variables. Finally, we implement a Heisenberg AND gate based on a network of three coupled stochastic LLG equations, illustrating the concept of probabilistic computing with a programmable Heisenberg model.

The transistor celebrated its 75th birthday in 2022. The continued scaling of the transistor defined by Moore’s law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from …

108 Design Exploration of 14 nm FinFET for Energy-Efficient Cryogenic Computing by AD Gaidhane, R. Saligram, W. Chakraborty, S. Datta, A. Raychowdhury, and Y. Cao