chenming hu

We show that a boost in injection velocity results from increased dielectric confinement of electric fields in low EOT (Effective Oxide Thickness) gate stacks. This is demonstrated by extracting injection velocity from experimental measurements of 90 nm channel length Negative Capacitance MOSFETs that utilize a 1.8 nm ferroelectric-antiferroelectric (FE-AFE) HfO2-ZrO2 (HZH) superlattice gate stack. The velocity enhancement becomes more pronounced at low temperatures where carrier screening and phonon scattering effects are diminished. An analytical velocity model based on carrier scattering explains the experimental data. The model further predicts substantial improvement in velocity and operating voltage at room temperature as EOT is scaled down from 9.5Å to 6.5Å.

A global I-V and C-V BSIM-CMG parameter extraction methodology based on deep learning is proposed. 100 k training datasets were generated through Monte Carlo simulation varying 28 IV and CV model parameters in the industry-standard BSIM-CMG FinFET model. For each of the 100 k Monte Carlo-selected BSIM-CMG parameter dataset, the ID-VG and CGG-VG characteristics of seven Monte Carlo-selected gate lengths ranging from 14 nm to 110 nm were generated as the input to train the parameter extraction neural network. The neural network outputs for training are the 28 model parameters’ values. The neural network's capability to extract BSIM-CMG model parameters that accurately fit TCAD-generated ID-VG and CGG-VG data over a range of gate lengths was demonstrated. This marks the first time a deep learning compact model parameter extraction flow, employing a single neural network for both I …

In this study, we present a low thermal budget elevated-laser-liquid-phase-epitaxy technique designed for the precise fabrication of single-crystal islands (SCIs) intended for use in middle-end-of-line (MEOL) FinFETs. Each of these SCIs features a (100) orientation tended from Si seeding structure and is successfully integrated as channel materials in the MEOL circuit of a monolithic 3D IC (3DIC). This technique effectively mitigates the typical performance disparities associated with poly-Si channel materials in upper tiers, addressing a significant challenge in advanced electronic device fabrication and potentially enhancing the performance and reliability of MEOL FinFETs in monolithic 3DIC.

In this article, we present a symmetric surface-potential-based model for dynamic depletion (DD) device operation of silicon-on-insulator (SOI) FETs for RF and analog IC design applications. The model accurately captures the device behavior in partial depletion (PD) and full depletion (FD) modes, as well as in the transition from PD to FD, based on device geometry, doping, and bias conditions. The model also exhibits an excellent source–drain symmetry during dc and small-signal simulations, resulting in error-free higher order harmonics. The model is fully scalable with bias, temperature, and geometry and has been validated extensively with real device data from the industry. The symmetric BSIM-SOI model is developed in Verilog-A and compatible with all commercial SPICE simulators, e.g., HSPICE, Spectre, and ADS.

This letter proposes and demonstrates single-crystal Germanium (Ge) growth by elevated-laser-liquid-phase-epitaxy (ELLPE) and the fabrication of Ge Fin field-effect transistors (FinFETs) for the monolithic three-dimensional integrated circuits (monolithic 3D ICs). This technique permitted the fabrication of single-crystalline (100) Ge film and FinFETs without random grain boundaries. In comparison with the poly-Ge FinFETs, the ELLPE Ge FinFETs exhibit superior performance and uniformity. Moreover, the ANSYS simulated maximum temperature of bottom circuits during the ELLPE technique does not exceed 400 °C, therefore allowing monolithic 3D integration of ICs.

We present a new compact model of a perpendicular spin-transfer-torque (STT) magnetic tunnel junction (MTJ). Previous studies on STT-MTJs have either focused on solving the Landau–Lifshitz–Gilbert (LLG) equation or utilizing critical current-based macro models. However, the LLG approaches are too complex for large circuit simulations, while the macro models fail to capture the underlying magnetization physics. In this work, we propose a semiphysical and computationally efficient compact model that accurately represents the time-dependent magnet moment and resistance. To validate our model, we compare it with various experimental data and LLG-based STT-MTJ model. The model demonstrates geometry dependence and temperature dependence. Furthermore, we develop a continuous switching probability model to effectively track the probabilities of states under arbitrary waveforms.

We present cryogenic characterization and compact model extraction of commercially fabricated 5nm technology FinFETs. A modified industry-standard BSIM-CMG model is used to accurately model band-tail, mobility, and velocity saturation effects up to 10K. At 10K, n-FinFET and p-FinFET show 87mV and 92mV threshold voltage shift and sub-threshold slopes of 12.7 and 16.7mV/decade (83% and 78% improvement), respectively. The simulated inverter and ring oscillator at 10K in iso I OFF condition show 38% and 36.53% delay improvement for V DD = 0.75V, respectively. At V DD = 0.35V, inverter simulations show ∽ 70% improvement in delay and Power-Delay-Product. Static leakage and power dissipation are major challenges in FinFETs; the above-mentioned performance enhancements highlight the potential of characterized technology in quantum computers.

BSIM-Bulk MOSFET Model for IC Design-Digital, Analog, RF and High-Voltage provides in-depth knowledge of the internal operation of the model. The authors not only discuss the fundamental core of the model, but also provide details of the recent developments and new real-device effect models. In addition, the book covers the parameter extraction procedures, addressing geometrical scaling, temperatures, and more. There is also a dedicated chapter on extensive quality testing procedures and experimental results. This book discusses every aspect of the model in detail, and hence will be of significant use for the industry and academia. Those working in the semiconductor industry often run into a variety of problems like model non-convergence or non-physical simulation results. This is largely due to a limited understanding of the internal operations of the model as literature and technical manuals are insufficient. This also creates huge difficulty in developing their own IP models. Similarly, circuit designers and researcher across the globe need to know new features available to them so that the circuits can be more efficiently designed. Reviews the latest advances in fabrication methods for metal chalcogenide-based biosensors Discusses the parameters of biosensor devices to aid in materials selection Provides readers with a look at the chemical and physical properties of reactive metals, noble metals, transition metals chalcogenides and their connection to biosensor device performance